Power Management Communication using IPIs
In the Zynq UltraScale+ MPSoC, the power management communication layer is implemented using inter-processor interrupts (IPIs), provided by the IPI block. See this link to the “Interrupts” chapter of the Zynq UltraScale+ Device Technical Reference Manual (UG1085) for more details on IPIs.
Each PU has a dedicated IPI channel with the power management controller, consisting of an interrupt and a payload buffer. The buffer passes the API ID and up to five arguments. The IPI interrupt to the target triggers the processing of the API, as follows:
- When calling an API function, a PU generates an IPI to the power management unit (PMU), prompting the execution of necessary power management action.
- The PMU performs each PM action atomically, meaning that the action cannot be interrupted.
- To support PM callbacks, which are used for notifications from the PMU to a PU, each PU implements handling of these callback IPIs.