Stream connections using vpp::stream - 2022.2 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
UG1393
Release Date
2022-12-07
Version
2022.2 English

Each argument of a PE function has to be connected to either an argument of the top-level compute() function, or to a statically declared stream. A vpp::stream inherits from the Vitis HLS hls::stream which is described in HLS Stream Library.

The vpp::stream object provides a few additional features:

  • The vpp::stream constructor takes an additional argument, post_check, the default value is true. Most stream variables will be expected to be empty at the end of each compute call, but others might be designed to carry over data across multiple compute() calls. In software emulation, by default vpp::stream will be checked to be empty at the end of each compute() call, and will assert if it is not. The optional post_check argument lets you turn off this assertion.
  • The DEPTH parameter allows the user to specify a FIFO depth to be implemented in hardware, as well as used during software and hardware emulation.
    Tip: The default value of DEPTH is set to 1024 and that is typically an over-utilization of resources in hardware compilation. You are recommended to specify the depth for streams used in the scope of compute() to conserve resources. You can run software emulation with a small depth of 2 to test functionality and help determine the required depth.
  • A vpp::stream variable can be passed down to a PE-function argument which can be of type hls::stream.
  • The vpp::stream variable must be declared static to ensure proper functional validation in Vitis software emulation. In hardware, a stream/FIFO is not emptied implicitly and its content is persistent across different runs. It behaves in the same way as a static variable.

The following sections describe popular styles of composing a pipelined system of PEs using basic C++ coding within the compute() body scope. The PEs in the pipeline can use direct AXI4-Stream connections or AXI4 (M_AXI) global memory access to move data across PEs.