AI Engine-ML (AIE-ML) is available in Versal AI Edge and a few AI Core series devices. The compute tiles are similar to AI-Engine tiles with additional support for BFloat data type. AI-Engine-ML has additional shared memory tiles for improved performance and data movement.
The maximum total supported memory by memory tile is up to 38 Mb across AIE Array, depending on the device. Memory Tile memory banks have 512KB SRAM, arranged in 16 physical banks. Each 128-bit wide and 2K words deep. For early estimation, an average number of memory banks that can be used is computed and auto-populated by PDM.
AI Enigine-ML supports import of .xpe file that is generated from Vitis AI Engine ML compiler, which is similar to AIE for more accurate usage and read/write rates.
For more information please refer to Versal ACAP AIE-ML Architecture Manual (AM020).