Support Files for Core Container - 2022.2 English

Vivado Design Suite User Guide: Designing with IP (UG896)

Document ID
UG896
Release Date
2022-11-02
Version
2022.2 English

As with the simulation files, additional support files for an IP using Core Container are extracted for convenience during generation of the IP. These files consist of:

  • Simulation files as described in the previous section, Simulating with Core Container.
  • Instantiation template files for Verilog, SystemVerilog, and VHDL (.veo and .vho)
  • Stub files for use in a third-party synthesis tool to infer a black box for the IP (*_stub.v and *_stub.vhdl)

These support files are located in one of two places: When using a project, the files are in <project_directory>\<project name>.ip_user_files\ip\<ip_name>\. When using a Managed IP project, the files are in: <managed_IP_project_directory>\ip_user_files\ip\<ip_name>