To reduce the simulation runtimes, the fast GTXE2 simulation model has the following feature differences:
- GTX links must be of synchronous with no Parts Per Million (PPM) rate differences between the near and far end link partners.
- Latency through the GTX is not cycle accurate with the hardware operation.
Method 1: Using the complete Verilog UNIFAST library (Recommended)
Method 1 is the recommended method whereby you simulate with all the UNIFAST models.
Use the following Tcl command in Tcl console to enable UNIFAST support (fast simulation models) in a Vivado project environment for the Vivado simulator, ModelSim or VCS:
set_property unifast true [current_fileset –simset]
See the UNISIM Library for more information regarding component files.
For more information, see the appropriate third-party simulation user guide.
Method 2: Using specific UNIFAST modules
Recommended for more advanced users who want to specify which modules to simulate with the UNIFAST models.
To specify individual library components, Verilog configuration statements are used. Specify the following in the config.v file:
- The name of the top-level module or configuration (for example:
- The name to which the design configuration applies (for example:
design test bench;)
- The library search order for cells or instances that are not explicitly called
out (for example:
default liblist unisims_ver unifast_ver;)
- The map for a particular CELL or INSTANCE to a particular
library (For example:
instance testbench.inst.O1 use unifast_ver.MMCME2;)Note: For ModelSim (vsim) only
-genblkis added to hierarchy name (for example:
instance testbench.genblk1.inst.genblk1.O1 use unifast_ver.MMCME2; - VSIM).
config cfg_xilinx; design testbench; default liblist unisims_ver unifast_ver; //Use fast MMCM for all MMCM blocks in design cell MMCME2 use unifast_ver.MMCME2; //use fast dSO48E1for only this specific instance in the design instance testbench.inst.O1 use unifast_ver.DSP48E1; //If using ModelSim or Questa, add in the genblk to the name (instance testbench.genblk1.inst.genblk1.O1 use unifast_ver.DSP48E1) endconfig