Booting the FPGA Device - 2022.2 English

Vivado Design Suite User Guide: Programming and Debugging (UG908)

Document ID
UG908
Release Date
2022-10-19
Version
2022.2 English

After programming the configuration memory device, you can issue a soft boot operation (i.e., JPROGRAM) to initiate the FPGA configuration from the attached configuration memory device. If you want to perform a Boot operation on the target FPGA select the target device and right-click and select Boot from Configuration Memory Device.

Figure 1. Boot from Configuration Memory Device

Important: There can be situations after booting from configuration memory where the debug cores do not show up immediately due to system boot up considerations. Xilinx® recommends that you wait for the specified time period as appropriate using the boot_hw_device Tcl command in the Vivado® Hardware Manager Tcl Console, as shown below:
boot_hw_device after 1000 [refresh_hw_device] 
 Where the 1000 can be the specified by you as the max "wait_on" value.