In a typical PCIe setup - you can use the Debug Bridge in the PCIe to BSCAN mode to communicate with the debug cores. In this mode, Debug Bridge connects to the Extended Configuration Interface of the PCIe IP. This is a common data center use case where PCIe is the preferred communication pathway to the Host PC instead of JTAG. For more information on using the XVC flow with the PCIe core and Debug Bridge in this mode, and for an example design refer to UltraScale+ Devices Integrated Block for PCI Express LogiCORE IP Product Guide (PG213).
Figure 1. PCIe to BSCAN Debug Bridge Used with PCIe Extended Configuration Interface