Revision History - 2022.2 English

Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)

Document ID
UG994
Release Date
2022-10-19
Version
2022.2 English

The following table shows the revision history for this document.

Section Revision Summary
10/19/2022 version 2022.2
Versal Designs with IP Integrator Added new chapter
Paths Added a new section
Configuring Block Design Containers from Top BD  Updated section
Downloading Board Files from GitHub Using the Vivado Updated the section
Selecting a Target Board Updated the section
Limitations of the Module Reference Feature Updated the section
04/20/2022 Version 2022.1
Using the Generate Output Products Dialog Box Updated a figure.
Resource Estimation in Block Design Added new section.
Modular Design with Block Design Containers Removed a note.
Applying Changes to Block Design Containers Added to the note.
BDC Limitations Added new section.
Generating Output Products Updated a figure.
Creating a Flow in Non-Project Mode Added to the CAUTION note.
Selectively Upgrading IP Flow in Project Mode Updated a figure.
Limitations of Selectively Upgrading IP in Block Designs Updated a figure.
Referencing a Module Updated the section.
XCI Inferencing Updated the section.
Inferring Control Signals in a RTL Module Updated the section.
X_MODULE_SPEC Attribute Added new section.
Limitations of the Module Reference Feature Updated the section.