Apply Constraints and Implement Design - 2023.1 English

Versal Adaptive SoC Design Guide (UG1273)

Document ID
UG1273
Release Date
2023-05-16
Version
2023.1 English

After the board design is fixed, you must ensure that the design stays within the constraints identified for power, power delivery, timing, and pinout to ensure the design meets your requirements. At a minimum, AMD recommends constraining the design for total power and providing maximum ambient and Theta Ja for the most accurate estimation. AMD allows you to constrain both the device power and the power delivery solution by combining the power supplies that are connected to the same regulator and specifying the maximum current for the regulator. You can use report_power to check whether any supplies are overutilized. For more information, see the Vivado Design Suite User Guide: Power Analysis and Optimization (UG907).

Following are examples of device power constraints:

set_operating_conditions -process maximum
set_operating_conditions -ambient_temp 40
set_operating_conditions -thetaja 1.5
set_operating_conditions -design_power_budget 10.2
Tip: The Vivado tools also support power rail constraints. For information, see this link in the Vivado Design Suite User Guide: Power Analysis and Optimization (UG907).