Dynamic function exchange (DFx) allows portions of a running AMD device to be reconfigured in real-time with a partial bitstream, changing the features and functions of the running design. The reconfigurable modules must be properly planned to ensure they function as needed for maximum performance.
The DFx flow requires a strict design process to ensure that the reconfigurable modules are designed properly to enable glitch-less operation during partial bitstream updates. This includes reducing the number of interface signals into the reconfigurable module, floorplanning device resources, and pin placement; as well as adhering to special DFx DRCs. The device programming method must also be properly planned to ensure the configuration I/O pins are assigned appropriately.
The DFx tool flow and features are described in the following resources: