Working with IP Integrator Sources - 2023.1 English

Vivado Design Suite User Guide: System-Level Design Entry (UG895)

Document ID
UG895
Release Date
2023-05-16
Version
2023.1 English

In the Vivado Design Suite, you can add and manage IP subsystem block designs (.bd) in an RTL project or design. Using the Vivado IP integrator, you can create an IP subsystem block design. The IP integrator enables you to create complex system designs by instantiating and interconnecting multiple IP cores from the Vivado IP catalog. You can create designs interactively through the IP integrator canvas in the Vivado IDE or programmatically with Tcl commands. For information on using the IP integrator, see the Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994).

Important: The AMD Vivado™ IP integrator is the replacement for Xilinx Platform Studio (XPS) for new embedded processor designs, including designs targeting AMD Zynq™ 7000 devices and MicroBlaze™ processors. To move existing XPS designs into the Vivado IP integrator see the Migrating from XPS to IP Integrator topic in the ISE to Vivado Design Suite Migration Guide (UG911).