Working with Vitis HLS Sources - 2023.1 English

Vivado Design Suite User Guide: System-Level Design Entry (UG895)

Document ID
UG895
Release Date
2023-05-16
Version
2023.1 English

The AMD Vitis™ High-Level Synthesis (HLS) tool transforms a C specification into a register transfer level (RTL) implementation that you can synthesize into an AMD device. You can write C specifications in C, C++, or SystemC, and the AMD device provides a massively parallel architecture with benefits in performance, cost, and power over traditional processors.

The outputs from Vitis HLS include RTL implementation files in hardware description language (HDL) formats that can be synthesized in Vivado synthesis or packaged as an IP block for use from the IP catalog. For more information, see Vitis High-Level Synthesis User Guide (UG1399).