Primitive: Configuration Frame Error Correction
- PRIMITIVE_GROUP: CONFIGURATION
- PRIMITIVE_SUBGROUP: ECC
- Families: UltraScale+
This design element enables the dedicated, built-in error correction code (ECC) for the configuration memory of the device. This element contains outputs that allow monitoring of the status of the ECC circuitry and the status of the readback CRC circuitry. This element is reserved for the exclusive use of Xilinx-generated SEM IP and is not supported for user applications.
Design Entry Method
|IP and IP Integrator Catalog
- UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)