OBUFDS_DPHY - 2023.1 English

UltraScale Architecture Libraries Guide (UG974)

Document ID
UG974
Release Date
2023-05-17
Version
2023.1 English

Primitive: Differential Output Buffer with MIPI support

  • PRIMITIVE_GROUP: I/O
  • PRIMITIVE_SUBGROUP: OUTPUT_BUFFER
  • Families: UltraScale+

Introduction

Differential output buffer with MIPI support.

Port Descriptions

Port Direction Width Function
HSTX_I Input 1 Data input (HS TX).
HSTX_T Input 1 Tristate Control input (HS TX).
LPTX_I_N Input 1 Data input (LP TX) (Master-N).
LPTX_I_P Input 1 Data input (LP TX) (Master-P).
LPTX_T Input 1 Tristate Control input (LP TX).
O Output 1 Diff_P Data output.
OB Output 1 Diff_N Data output.

Design Entry Method

Instantiation Recommended
Inference No
IP and IP Integrator Catalog Yes

Available Attributes

Attribute Type Allowed Values Default Description
IOSTANDARD STRING String "DEFAULT" Assigns an I/O standard to the element

VHDL Instantiation Template

Unless they already exist, copy the following two statements and paste them before the entity declaration.
Library UNISIM;
use UNISIM.vcomponents.all;

-- OBUFDS_DPHY: Differential Output Buffer with MIPI support
--              UltraScale
-- Xilinx HDL Language Template, version 2023.1

OBUFDS_DPHY_inst : OBUFDS_DPHY
generic map (
   IOSTANDARD => "DEFAULT"  -- I/O standard
)
port map (
   O => O,               -- 1-bit output: Diff_P Data output
   OB => OB,             -- 1-bit output: Diff_N Data output
   HSTX_I => HSTX_I,     -- 1-bit input: Data input (HS TX)
   HSTX_T => HSTX_T,     -- 1-bit input: Tristate Control input (HS TX)
   LPTX_I_N => LPTX_I_N, -- 1-bit input: Data input (LP TX) (Master-N)
   LPTX_I_P => LPTX_I_P, -- 1-bit input: Data input (LP TX) (Master-P)
   LPTX_T => LPTX_T      -- 1-bit input: Tristate Control input (LP TX)
);

-- End of OBUFDS_DPHY_inst instantiation

Verilog Instantiation Template


// OBUFDS_DPHY: Differential Output Buffer with MIPI support
//              UltraScale
// Xilinx HDL Language Template, version 2023.1

OBUFDS_DPHY #(
   .IOSTANDARD("DEFAULT")  // I/O standard
)
OBUFDS_DPHY_inst (
   .O(O),               // 1-bit output: Diff_P Data output
   .OB(OB),             // 1-bit output: Diff_N Data output
   .HSTX_I(HSTX_I),     // 1-bit input: Data input (HS TX)
   .HSTX_T(HSTX_T),     // 1-bit input: Tristate Control input (HS TX)
   .LPTX_I_N(LPTX_I_N), // 1-bit input: Data input (LP TX) (Master-N)
   .LPTX_I_P(LPTX_I_P), // 1-bit input: Data input (LP TX) (Master-P)
   .LPTX_T(LPTX_T)      // 1-bit input: Tristate Control input (LP TX)
);

// End of OBUFDS_DPHY_inst instantiation

Related Information

  • UltraScale Architecture SelectIO Resources User Guide (UG571)