Package Parameter Guidelines

Artix UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS931)

Document ID

DS931

Release Date

2023-12-26

Revision

1.6 English

The parameters in this section provide the necessary values for calculating timing budgets for clock transmitter and receiver data-valid windows.

Table 1. Package Skew
Symbol	Description	Device	Package	Value	Units
PKGSKEW	Package Skew^{1, 2}	XCAU7P	FCVA289		ps
		XCAU7P	SBVC484	86	ps
		XCAU10P	UBVA368	59	ps
			SBVB484	87	ps
			FFVB676	81	ps
		XCAU15P	UBVA368	59	ps
			SBVB484	87	ps
			FFVB676	81	ps
		XCAU20P	FFVB676	69	ps
		XCAU20P	SFVB784	75	ps
		XCAU25P	FFVB676	69	ps
		XCAU25P	SFVB784	75	ps
		XAAU10P	SBVB484	87	ps
		XAAU10P	FFVB676	81	ps
		XAAU15P	SBVB484	87	ps
		XAAU15P	FFVB676	81	ps
These values represent the worst-case skew between any two SelectIO resources in the package: shortest delay to longest delay from die pad to ball. Package delay information is available for these device/package combinations. This information can be used to deskew the package.