Revision History - 3.0 English

DisplayPort 1.4 TX Subsystem Product Guide (PG299)

Document ID
Release Date
3.0 English

The following table shows the revision history for this document.

Section Revision Summary
05/04/2022 v3.0
General updates Made minor technical changes across the document.
06/30/2021 v3.0
Configuring HDCP Keys and Key Management Added EEPROM method for HDCP key management.
01/13/2021 v3.0
Core Overview Added line rate support for Versal devices.
AUX Channel Interface Updated 0x140 and 0x144 offset description.
DisplayPort Audio Registers Updated 0x308 offset description and added 0x6A0 offset to table.
HDCP 1.3 Registers Added new section.
HDCP 2.2/2.3 Registers Added new section.
Designing with the Subsystem
  • Added YUV420 support
  • Added DSC and FEC support
  • Added Adaptive Sync support
  • Added Versal device support
  • Added Physical Layout section
  • Added Programming Sequence section
AXI4-Stream Interface Color Mapping Added additional footnotes to table.
Example Design Added Versal device example design based on VCK190 platform.
Available Example Designs Added additional footnote to table.
08/31/2020 v2.1
Core Overview Updated with device specific line rate information.
Designing with the Subsystem Added eDP support.
Example Design Added Configuring HDCP Keys and Key Management sections.
12/02/2019 v2.1
General updates
  • HDCP 2.2 support
  • FB Pass-through with HDCP 1.3 and HDCP 2.2
  • Added Appendix D for helper cores
  • Vitis flow updated in chapter 6
05/22/2019 v2.1
Example Design MST FB Pass-through example design details added
12/05/2018 v2.0
MST Interface Added MST interface ports
HDCP Key Interface HDCP Ports added
Programming the Core in MST Mode MST Programming added
Pixel Mapping Examples on AXI4-Stream Interface (UG934-Compliant) UG934-compliant pixel mapping
04/04/2018 v1.0
Initial release. N/A