The subsystem uses the Xilinx® AXI Smartconnect IP core, as a smart connect, which contains one AXI4-Lite slave interface and two AXI4-Lite master interfaces.
The following figure shows the AXI slave structure within the
DisplayPort 1.4 RX Subsystem. For more details on the AXI smart
connect functionality, see the
SmartConnect LogiCORE IP Product Guide (PG247).
Figure 1.
AXI4-Lite Interconnect
within DisplayPort 1.4 RX Subsystem
