External Versal PHY Control Interface - 3.0 English

DisplayPort 1.4 RX Subsystem Product Guide (PG300)
Document ID
PG300
Release Date
2022-05-04
Version
3.0 English
Table 1. External Versal PHY Control Interface
Port Name I/O Description
rx_gt_ctrl_out[31:0] O

External Versal® device PHY control output and mapped to 0x04C AXI4-Lite register with R/W access.

[0] - Reset

[3:1] - Line Rate

[6:4] - Lane Count

[31:7] - Reserved