GT Quad Locations - 3.0 English

Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2022-06-15
Version
3.0 English

The following table identifies the PCIe lane0 GT Quad(s) that can be used for each PCIe controller location. The Quad shown in bold is the most adjacent or suggested GT Quad for each PCIe lane0 location.

Table 1. CPM4 GTY Locations
Device Package CPM Controller GT QUAD for X16 GT QUAD for X8 GT QUAD for X4
XCVM1302, XCVM1402 All CPM Controller 1 N/A GTY_QUAD_X0Y3 GTY_QUAD_X0Y2 GTY_QUAD_X0Y2
CPM Controller 0 GTY_QUAD_X0Y3 GTY_QUAD_X0Y2 GTY_QUAD_X0Y1 GTY_QUAD_X0Y0 GTY_QUAD_X0Y1 GTY_QUAD_X0Y0 GTY_QUAD_X0Y0
XCVC1902, XCVM1502, XCVM1802, XCVC1702, XCVC1802, XCVE1752 All CPM Controller 1 N/A GTY_QUAD_X0Y6 GTY_QUAD_X0Y5 GTY_QUAD_X0Y5
CPM Controller 0 GTY_QUAD_X0Y6 GTY_QUAD_X0Y5 GTY_QUAD_X0Y4 GTY_QUAD_X0Y3 GTY_QUAD_X0Y4 GTY_QUAD_X0Y3 GTY_QUAD_X0Y3