Host PC HSDP-PCIe Driver - 3.0 English

Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2022-06-15
Version
3.0 English

The HSDP-PCIe driver provides connectivity to the debug over PCIe enabled FPGA hardware resource that is connected to the Host PC via PCIe link. It acts as a bridge between the user-space hw_server application and the FPGA hardware. The driver, depending on the FPGA design and the arguments specified to hw_server, can function in mgmt mode or user mode. The hardware design requirements for HSDP-over-PCIe for both mgmt and user mode and their differences will be specified in a later section. You must supply the required parameters associated with the hardware design to the driver via a configuration header file before compilation and module installation. The HSDP-PCIe driver for Linux will be provided for download on GitHub at a later date or contact Xilinx Support for driver delivery.