| Port Name | I/O | Description |
|---|---|---|
| dma0_st_rx_msg_tvalid | O | Valid |
| dma0_st_rx_msg_tdata[31:0] | O |
Beat 1: {REQ_ID[15:0], VDM_MSG_CODE[7:0], VDM_MSG_ROUTING[2:0], VDM_DW_LENGTH[4:0]} Beat 2: VDM Lower Header [31:0] or {(Payload_length=0), VDM Higher Header [31:0]} Beat 3 to Beat <n>: VDM Payload |
| dma0_st_rx_msg_tlast | O | Indicates the last beat |
| dma0_st_rx_msg_tready | I | Ready. Note: When this interface is not used, Ready must be
tied-off to 1.
|
Recommended: RX Vendor Defined Messages are stored in shallow FIFO
before they are transmitted to output ports. When there are many back-to-back VDM
messages, the FIFO overflows and these messages are dropped. It is best to repeat
VDM messages at regular intervals.