PS-NoC Interfaces - 3.0 English

The PS-NoC Interfaces tab enables memory-mapped connectivity from the Control, Interfaces and Processing System processors to other Versal™ device resources such as DDR, AI Engine, and PL.

The following table lists the NoC interfaces from which you can select in the customization core:

Table 1. List of NoC Interfaces
Interface Name	Size	Notes
4 NoC Master Ports	128-bit channels	PS-CCI → NoC channels
2 NoC Master Ports	128-bit channels	PS-NCI → NoC channels
1 NoC Master Ports	128-bit channels	PS-LPD (RPU) → NoC channels
1 NoC Master Ports	128-bit channels	PMC/Debug → NoC channels(via LPD)
2 NoC Master Ports	128-bit channels	CPM4/5 (PCIe/CCIX) → NoC channels (via LPD)
4 NoC Slave Ports	128-bit channels	NoC → PS channels (2 go to CCI, 2 go to NCI)
1 NoC Slave Ports	128-bit channels	NoC → PS-LPD/PMC channels
1 NoC Slave Ports	128-bit channels	NoC → PCIe/CCIX/CPM4/5 channels (via LPD)

The CIPS IP core for the NoC interface selection is shown below:

Figure 1. PS-NoC Interfaces

The following are a few recommendations on the usage of PS-NoC ports.

If any design has AI Engine then you must enable PMC NoC port for AI Engine configuration.
By default, the 32-bit RPU is unable to access or control the AI Engine at its >32-bit address. This access can be enabled by remapping the entire LPD_AXI_NOC_0 address range of the upper 1GB of DDR LOW0 region (0x40000000 to 0x7FFFFFFF) to the AI Engine for all LPD masters with the Tcl command (assuming axi_noc_0 is the NoC instance name, and LPD_AXI_NOC is connected to S00_AXI, and the AI Engine IP is connected to M00_AXI):
```
set_property CONFIG.REMAPS {M00_AXI {{0x4000_0000 0x200_0000_0000 1G} [get_bd_intf_pins /axi_noc_0/S00_AXI]}}
```
If any LPD masters such as LPDMA, GEM, or USB DMA still want to access the full DDR at this range, these masters transactions must be routed through the FPD.
Note: Following is the Tcl command to enable the route through FPD support for LPD Masters:
```
set_property -dict [list CONFIG.PS_PMC_CONFIG  
{PMC_SD0_ROUTE_THROUGH_FPD 1 
PMC_SD1_ROUTE_THROUGH_FPD 1 
PMC_OSPI_ROUTE_THROUGH_FPD 1 
PMC_QSPI_ROUTE_THROUGH_FPD 1 
PS_USB_ROUTE_THROUGH_FPD 1 
PS_GEM0_ROUTE_THROUGH_FPD 1 
PS_GEM1_ROUTE_THROUGH_FPD 1 
PS_LPDMA0_ROUTE_THROUGH_FPD 1 
PS_LPDMA1_ROUTE_THROUGH_FPD 1 
PS_LPDMA2_ROUTE_THROUGH_FPD 1 
PS_LPDMA3_ROUTE_THROUGH_FPD 1 
PS_LPDMA4_ROUTE_THROUGH_FPD 1 
PS_LPDMA5_ROUTE_THROUGH_FPD 1 
PS_LPDMA6_ROUTE_THROUGH_FPD 1 
PS_LPDMA7_ROUTE_THROUGH_FPD 1}] 
[get_bd_cells versal_cips_0]
```
All 4 PS to NoC CCI ports must connect to the NoC.