The Xilinx Soft Error Mitigation (XilSEM) library provides a pre-configured and pre-verified solution to detect and optionally correct soft errors in Configuration Memory of Versal ACAPs. The fundamental feature of the XilSEM Library can be enabled in CIPS. This features soft error mitigation of Configuration RAM through a scan-based process automated by integrated logic. It is managed by the XilSEM Library which reads back Configuration RAM and uses ECC and CRC to detect and correct soft errors. If this feature is enabled in CIPS, the default behavior is to begin operation automatically after boot, calculate golden checkrooms using hardware resources, and then enable the process for error detection and correction. These options can also be accessed through properties applied to the design. The following figure shows the fundamental feature accessible through the XilSEM Library configuration section of the CIPS GUI.
Advanced features of the XilSEM Library can be accessed through properties applied to the design. The XilSEM Library provides an optional feature for the soft error mitigation of NPI Registers, provided the supplemental hardware resources required for this feature are accessible. This feature is a scan-based process automated by integrated logic and managed by the XilSEM Library, which reads back NPI Registers and uses SHA to detect errors. For more information, see OS and Libraries Document Collection (UG643).