All interrupts generated by the HDMI 1.4/2.0 RX Subsystem are listed here:
– Peripheral I/O to assert HDMI cable 5.0V signal
- Rising edge – Cable connected
- Falling edge – Cable disconnected
- Link Ready – Every time the PHY Controller is reconfigured, the
link_clkis regenerated. An HDMI RX sub-core register bit (link status bit) reflects the change of
link_clkstatus. When stable
link_clkis detected, it is set to 1. When
link_clkbecomes unstable, it is set to 0. The Link Ready is an interrupt to detect the change of the link status bit.
- Rising edge – Link is up
- Falling edge – Link is down
- Video Ready – This interrupt
is generated by the HDMI RX sub-core to reflect the status of the received video
- Rising edge – Video Stream is stable (StreamUp)
- Falling edge – Video Stream is not stable (StreamDown)
- HDMI Receiver Auxiliary Infoframe Interrupt – This interrupt is generated when an Auxiliary Infoframe is received.
- HDMI Receiver Audio Infoframe Interrupt – This interrupt is generated when an Audio Infoframe is received.
- HDCP1.4 Interrupt (only available when HDCP 1.4 is enabled in hardware)
- HDCP 1.4 Timer Interrupt (only available when HDCP 1.4 is enabled in hardware)
|Video Ready (edge triggered)||
Video Ready rising edge: Stream Up
Video Ready falling edge: Stream Down
This callback function is not directly mapped to any interrupt source. Instead it is executed when a stream is detected and the Video PHY Controller /HDMI GT Subsystem is stabilized for the HDMI 1.4/2.0 RX Subsystem to start stream locking.
|HDMI Receiver Auxiliary Infoframe Interrupt||XV_HDMIRXSS_HANDLER_AUX|
|HDMI Receiver Audio Interrupt||XV_HDMIRXSS_HANDLER_AUD|
|HDCP 1.4 Interrupt|
|HDCP 1.4 Timer Interrupt|
|HDCP 2.3 Timer Interrupt (only available when HDCP 2.3 is enabled in hardware)|
This callback function is not directly mapped to any interrupt source. Instead it is executed when the HDCP authentication state machine has reached the authenticated state.