Pause Interface - TX Path Ports - 3.2 English

40G/50G High Speed Ethernet Subsystem Product Guide (PG211)

Document ID: PG211
Release Date: 2021-10-27
Version: 3.2 English

The following table describes the TX path signals.

Table 1. Pause Interface – TX Path Ports
Name	I/O	Clock Domain	Description
ctl_tx_pause_req[8:0]	I	clk	If a bit of this bus is set to 1, the 40G/50G High Speed Ethernet Subsystem transmits a pause packet using the associated quanta value on the ctl_tx_pause_quanta[8:0][15:0] bus. If bit[8] is set to 1, a global pause packet is transmitted. All other bits cause a priority pause packet to be transmitted.
ctl_tx_pause_quanta[8:0][15:0]	I	clk	These nine buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.
ctl_tx_pause_refresh_timer[8:0][15:0]	I	clk	These nine buses set the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.
ctl_tx_da_gpp[47:0]	I	clk	Destination address for transmitting global pause packets.
ctl_tx_sa_gpp[47:0]	I	clk	Source address for transmitting global pause packets.
ctl_tx_ethertype_gpp[15:0]	I	clk	Ethertype for transmitting global pause packets.
ctl_tx_opcode_gpp[15:0]	I	clk	Opcode for transmitting global pause packets.
ctl_tx_da_ppp[47:0]	I	clk	Destination address for transmitting priority pause packets.
ctl_tx_sa_ppp[47:0]	I	clk	Source address for transmitting priority pause packets.
ctl_tx_ethertype_ppp[15:0]	I	clk	Ethertype for transmitting priority pause packets.
ctl_tx_opcode_ppp[15:0]	I	clk	Opcode for transmitting priority pause packets.
ctl_tx_resend_pause	I	clk	Re-transmit pending pause packets. When this input is sampled as 1, all pending pause packets are retransmitted as soon as possible (that is, after the current packet in flight is completed) and the retransmit counters are reset. This input should be pulsed to 1 for one cycle at a time.
stat_tx_pause_valid[8:0]	O	clk	If a bit of this bus is set to 1, the 40G/50G High Speed Ethernet Subsystem has transmitted a pause packet. If bit[8] is set to 1, a global pause packet is transmitted. All other bits cause a priority pause packet to be transmitted.