TX Pause Interface Control/Status/Statistics Signals - 3.2 English

40G/50G High Speed Ethernet Subsystem Product Guide (PG211)
Document ID
PG211
Release Date
2021-10-27
Version
3.2 English

Ports under this section are available when Enable TX Flow Control Logic is selected from the MAC Options tab and the CORE type is Ethernet MAC+PCS/PMA.

Table 1. TX Pause Interface Control/Status/Statistics Signals
Name Size I/O Description
ctl_tx_pause_req_* 9 I If a bit of this bus is set to 1, the CORE transmits a pause packet using the associated quanta value on the ctl_tx_pause_quanta[8:0][15:0] bus. If bit[8] is set to 1, a global pause packet is transmitted. All other bits cause a priority pause packet to be transmitted.
ctl_tx_pause_enable_* 9 I TX pause enable signal. This input is used to enable the processing of the pause quanta for the corresponding priority. This signal gates transmission of pause packets.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_resend_pause_* 1 I Re-transmit pending pause packets. When this input is sampled as 1, all pending pause packets are retransmitted as soon as possible (that is, after the current packet in flight is completed) and the retransmit counters are reset. This input should be pulsed to 1 for one cycle at a time.
ctl_tx_pause_quanta0 16 I These buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_quanta1 16 I These buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_quanta2 16 I These buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_quanta3 16 I These buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_quanta4 16 I These buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_quanta5 16 I These buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_quanta6 16 I These buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_quanta7 16 I These buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_quanta8 16 I These buses indicate the quanta to be transmitted for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_quanta[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_refresh_timer0 16 I This bus sets the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_refresh_timer1 16 I This bus sets the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_refresh_timer2 16 I This bus sets the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_refresh_timer3 16 I This bus sets the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_refresh_timer4 16 I This bus sets the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_refresh_timer5 16 I This bus sets the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_refresh_timer6 16 I This bus sets the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_refresh_timer7 16 I This bus sets the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_pause_refresh_timer8 16 I This bus sets the retransmission time of pause packets for each of the eight priorities in priority-based pause operation and the global pause operation. The value for ctl_tx_pause_refresh_timer[8] is used for global pause operation. All other values are used for priority pause operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_da_gpp_* 48 I Destination address for transmitting global pause packets.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_sa_gpp_* 48 I Source address for transmitting global pause packets.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_ethertype_gpp_* 16 I Ethertype for transmitting global pause packets.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_opcode_gpp_* 16 I Opcode for transmitting global pause packets.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_da_ppp_* 48 I Destination address for transmitting priority pause packets.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_sa_ppp_* 48 I Source address for transmitting priority pause packets.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_ethertype_ppp_* 16 I Ethertype for transmitting priority pause packets.

This port is available when the AXI4-Lite interface is not selected.
ctl_tx_opcode_ppp_* 16 I Opcode for transmitting priority pause packets.

This port is available when the AXI4-Lite interface is not selected.
stat_tx_pause_valid_* 9 O If a bit of this bus is set to 1, the 40G/50G High Speed Ethernet Subsystem has transmitted a pause packet. If bit[8] is set to 1, a global pause packet is transmitted. All other bits cause a priority pause packet to be transmitted.
stat_tx_unicast_* 1 O Increment for good unicast packets.
stat_tx_multicast_* 1 O Increment for good multicast packets.
stat_tx_broadcast_* 1 O Increment for good broadcast packets.
stat_tx_vlan_* 1 O Increment for good 802.1Q tagged VLAN packets.
stat_tx_pause_* 1 O Increment for 802.3x Ethernet MAC Pause packet with good FCS.
stat_tx_user_pause_* 1 O Increment for priority-based pause packets with good FCS.