Device Resources - 3.2 English

Zynq DPU Product Guide (PG338)

Document ID
PG338
Release Date
2020-07-07
Version
3.2 English

The DPU logic resource usage is scalable across Xilinx UltraScale+™ MPSoC and Zynq®-7000 devices. For more information on resource utilization, see the DPU Configuration section.