Configuration Registers for 10G/25G Ethernet Subsystem - 3.3 English

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2020-12-16
Version
3.3 English

The following tables define the bit assignments for the configuration registers.

Registers or bit fields within registers can be accessed for Read-Write (RW), Write-Only (WO), or Read-Only (RO). Default values shown are decimal values and take effect after a s_axi_aresetn.

A description of each signal is found in Port Descriptions – MAC+PCS Variant.