Latency - 3.3 English

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2020-12-16
Version
3.3 English

The following table provides the measured low latency information for the 10G/25G Ethernet Subsystem. This is the combined RX and TX latency for the core in the default configuration and does not include latency in the transceiver.

Table 1. Latency
Core Total Latency (ns) TX Latency (ns) RX Latency (ns) User Bus Width (bits) Core Clock Frequency (MHz)
10GE MAC + PCS 188.82 67.2 121.62 64 156.25
25GE MAC + PCS 80.41 29.58 50.83 64 390.625
10G PCS 332.8 172.8 160 64 156.25
25G PCS 138.25 71.68 66.57 64 390.625
10GE MAC + PCS 54.4 28.8 25.6 32 312.5
  1. These numbers include both RX and TX fabric logic, but do not include the GT.