Following are the register Map descriptions:
| Offset | Register Name | Access | Description |
|---|---|---|---|
| 0x0000 | TOD_CONFIG | RW |
Main configuration [0] – Enable system timer A ‘0’ to this bit field disables system timer IP [1] – Enable external ToD bus Write ‘1’ to enable ToD bus signals. The overwrite mode field further defines how signaling is used This is present only when the core is generated with external ToD bus I/F support [3:2] – Overwrite Mode:
The above modes are only present when the core is generated with Ext ToD bus interface support [4 to 19] – Enable port TX and RX timers
The upper limit for port number depends on the number of ports enabled at the time of generating core [31:20] - Reserved |
| 0x0004 | TOD_SNAPSHOT | RW1T |
[0] – Snapshot all timers Writing 1’b1 will snapshot all counters (system, external ToD bus, and all enabled ports) [31:1] - Reserved |
| 0x0008 | TOD_INTR_ENABLE | RW |
Interrupt enable register [0] - 1-PPS interrupt [31:1] - Reserved |
| 0x000C | TOD_INTR_STATUS | RW1C |
Interrupt clear register [0] - 1-PPS interrupt [31:1] - Reserved |
| 0x0010 | TOD_SW_SEC_0 | RW | [31:0] - Overwrite master timer’s second field bits [31:0] |
| 0x0014 | TOD_SW_SEC_1 | RW |
[15:0] - Overwrite master timer’s second field bits [47:32] [31:16] - Reserved |
| 0x0018 | TOD_SW_NS | RW |
[29:0] - Overwrite master timer’s second field bits [31:30] - Reserved |
| 0x001C | TOD_SW_LOAD | RW1T |
[0] - Write ‘1’ initiates a load of the system timer’s ToD values from the TOD_SW_SEC_0/1, TOD_SW_NS, and TOD_SW_CTIME_0/1 registers [1] - Write ‘1’ initiates a load of the system timer’s ToD offset value from the TOD_SEC_SYS_OFFSET_0/1, and TOD_NS_SYS_OFFSET_0 registers Note: Offset is added by logic prior to
system timer’s output to the port timers. As such, offset is not
reflected by system timer ToD read backs.
[31:0] - Reserved |
| 0x0020 | TOD_SW_CTIME_0 | RW | [31:0] - Overwrite master timer’s CF field bits [31:0] |
| 0x0024 | TOD_SW_CTIME_1 | RW |
[30:0] - Overwrite master timer’s second field bits [63:32] [31] - Reserved |
| 0x0028 | TOD_SEC_SYS_OFFSET_0 | RW |
{TOD_SEC_SYS_OFFSET_1[15:0], TOD_SEC_SYS_OFFSET_0[31:0]} - Represents system timer 48b seconds field signed offset value TOD_NS_SYS_OFFSET_0[29:0] - Represents system timer 30b nano second field signed offset value Signed bit interpreted as follows for TOD_SEC_SYS_OFFSET If [47] = 1’b1 then subtract from system timer If [47] = 1’b0 then add to system timer Need to apply trigger bit [1] at register 0x001C |
| 0x002C | TOD_SEC_SYS_OFFSET_1 | RW | |
| 0x0030 | TOD_NS_SYS_OFFSET_0 | RW | |
| 0x0100 | TOD_SYS_SEC_0 | RO | [31:0] - Snapshot of system timer’s second field [31:0] |
| 0x0104 | TOD_SYS_SEC_1 | RO |
[15:0] - Snapshot of system timer’s second field [47:32] [31:16] - Reserved |
| 0x0108 | TOD_SYS_NS | RO |
[29:0] - Snapshot of system timer’s Nano-second Field [29:0] [31:30] - Reserved |
| 0x010C | TOD_SYS_OFFSET | RW |
[31:0] - Signed offset to be applied to seconds value loaded from the external ToD bus, and to be added to 0 nanoseconds field when a 1PPS event occurs on the External ToD bus. The signed value is expressed in 2-16 ns This is present only when the core is generated with Ext ToD Bus support |
| 0x0110 | TOD_SYS_CTIME_0 | RO | [31:0] - Snapshot of system timer’s CF Field [31:0] |
| 0x0114 | TOD_SYS_CTIME_1 | RO |
[30:0] - Snapshot of system timer’s CF Field [63:32] [31] - Reserved |
| 0x0120 | TODBUS_SEC_0 | RO | Current value of the Ext ToD bus’s second Field [31:0] |
| 0x0124 | TODBUS_SEC_1 | RO |
[15:0] - Current value of the Ext ToD bus’s second field [47:32] [31:16] - Reserved |
| 0x012C | TODBUS_SYS_DIFF | RO | [31:0] - Once a second comparison of external ToD bus captured value and system Timer’s internal ToD value in signed unit of 2-16ns |