Navigating Content by Design Process - 3.3 English

Zynq DPU Product Guide (PG338)

Document ID
PG338
Release Date
2021-02-03
Version
3.3 English

Xilinx® documentation is organized around a set of standard design processes to help you find relevant content for your current development task. This document covers the following design processes:

System and Solution Planning
Identifying the components, performance, I/O, and data transfer requirements at a system level. Includes application mapping for the solution to PS, PL, and AI Engine. Topics in this document that apply to this design process include:
Hardware, IP, and Platform Development​
Creating the PL IP blocks for the hardware platform, creating PL kernels, subsystem functional simulation, and evaluating the Vivado® timing, resource use, and power closure. Also involves developing the hardware platform for system integration. Topics in this document that apply to this design process include:
System Integration and Validation​
Integrating and validating the system functional performance, including timing, resource use, and power closure. Topics in this document that apply to this design process include: