reg_dpu_start - 3.3 English

Zynq DPU Product Guide (PG338)

Document ID
PG338
Release Date
2021-02-03
Version
3.3 English

The reg_dpu_start register is the start signal for a DPU core. There is one start register for each DPU core. The details of reg_dpu_start are shown in the following table.

Table 1. reg_dpu_start
Register Address Offset Width Type Description
reg_dpu0_start 0x220 32 R/W DPU core0 start signal.
reg_dpu1_start 0x320 32 R/W DPU core1 start signal.
reg_dpu2_start 0x420 32 R/W DPU core2 start signal.

reg_dpu3_start

0x520 32 R/W DPU core3 start signal.