• Name – One of the five PLLs available in PS: APLL, VPLL, DPLL, IOPLL, and RPLL.
• Source – This is the source PLL for the corresponding peripheral.
• Multiplier – Denotes the 6-bit integer value which is used as a multiplier in calculating the respective PLL output frequency. The multiplier value should be entered in the manual mode for the required output clock frequency.
• VCO (MHz) – Resulted output frequency after applying the ‘Multiplier’.
• DIV2 – Enable the divide by 2 function inside the PLL. The output of this will be the actual output frequency of respective PLL.
• Cross domain Paths – Denotes the cross domain name as VPLL/DPLL/APLL_TO_LPD for FPD PLLs and as IOPLL/RPLL_TO_FPD for LPD PLLs.
• Divisors - Denotes the 6-bit integer value. This value will be used as divisor in calculating the cross domain output frequency for respective PLL. The divisor value should be entered in the manual mode for the required output clock frequency.
In the default mode, we cannot always get the actual frequency. It depends on the load on PLL (Number of different clocks in PLL drives).