Device Tree - 3.4 English

DPUCZDX8G for Zynq UltraScale+ MPSoCs Product Guide (PG338)

Document ID
PG338
Release Date
2022-01-20
Version
3.4 English

The device tree information is generated differently for the Vivado flow and Vitis flow.

In the Vivado flow, the DPUCZDX8G and Softmax IP are configured automatically by the PetaLinux.

In the Vitis flow, the device tree is included in the platform configuration. For more information about generating device tree in Vitis flow, see Update the Device Tree.

A device tree configuration sample for a Zynq UltraScale+ MPSoC is shown below:

&amba { 
   		...
    		dpu {    
				compatible = "xilinx,dpu";
				base-addr = <0x8f000000>;//CHANGE THIS ACCORDING TO YOUR DESIGN
				dpucore {
					compatible = "xilinx,dpucore";
					interrupt-parent = <&intc>;
					interrupts = <0x0 106 0x1 0x0 107 0x1>;
					core-num = <0x2>;
					};
        		};
				softmax {
					compatible = "xilinx, smfc";
					interrupt-parent = <&intc>;
					interrupts = <0x0 110 0x1>;
					core-num = <0x1>;
				.... 
}