Simulation Completes But Fails - 4.0 English

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2021-10-27
Version
4.0 English

If the sample simulation completes with a failure, contact Xilinx technical support. Each release is tested prior to shipment and normally completes successfully. Consult the sample simulation log file for the expected behavior.

The simulation debug flow for Questa® Advanced Simulator is illustrated in the following figure. A similar approach can be used with other simulators.

Figure 1. Mentor Graphics Questa Advanced Simulator Simulation Debug Flow