The example design above is generated when Descriptor Bypass for Read (H2C) and Descriptor Bypass for Write (C2H) options are selected in the PCIe DMA tab. These options can be selected with any of the DMA Interface Options in the Basic tab:
- AXI Memory Mapped and AXI4-Stream with Completion
- AXI Memory Mapped only
- AXI Stream with Completion
- AXI Memory Mapped with Completion
The Descriptor Bypass in/out loopback is controlled by the AXI4-Lite Master by writing to the Example Design Register DESCRIPTOR_BYPASS (0x090) bit and bit.
To enable Descriptor bypass out, proper context programming needs to be done. For details, see Context Programming.
C2H Stream Simple Bypass Mode Transfer
To set up a QDMA to data transfer in simple bypass mode
- Write the active qid to register 0x1408 (MDMA_C2H_PFCH_BYP_QID).
- Read the tag value from 0x140C (MDMA_c2H_PFCH_BYP_TAG).
- Write the tag value and qid that was used to fetch the tag in the example design register C3H_PREFETCH_TAG 0x24. The qid bits are [26:16] and tag bits are [6:0].
- Set up the simple bypass descriptor loopback by writing register
DESCRIPTOR_BYPASS 0x90 bits [2:0] =
After the setup initial C2H stream data transfer, the prefetch tag is valid until the qid is valid. When the current qid becomes invalid, you must generate a new tag.