The Interrupt Enable register (IER) is described in Table: Interrupt Enable Register (0x28) and allows you to selectively generate an interrupt at the output port for each error/status bit in the ISR. An IER bit set to 0 does not inhibit an error/status condition from being captured, but inhibits it from generating an interrupt.
Bits |
Name |
Reset Value |
Access |
Description |
---|---|---|---|---|
31 |
Frame Received |
0x0 |
R/W |
Set bits in this register to 1 to generate the required interrupts. Set to 0 to disable the interrupt.
|
30 |
VCX Frame Error |
0x0 |
R/W |
Set to 1 to generate the VCX Frame Error interrupt. |
29 |
RX_Skewcalhs |
0x0 |
R/W |
Set to 1 to generate the rxskecalhs interrupt. |
28 |
YUV420 WC Error |
0x0 |
R/W |
Set to 1 to generate the YUV420 WC Error interrupt. |
27 |
Pending write in internal FIFO |
0x0 |
R/W |
Set bits in this register to 1 to generate the required interrupts. Set to 0 to disable the interrupt. For a description of the specific interrupt you are enabling/disabling in this register see the ISR descriptions in Table: Interrupt Status Register (0x24) . |
26–23 |
Reserved |
N/A |
N/A |
|
22 |
Word Count (WC) corruption |
0x0 |
R/W |
|
21 |
Incorrect lane configuration |
0x0 |
R/W |
|
20 |
Short packet FIFO full |
0x0 |
R/W |
|
19 |
Short packet FIFO empty |
0x0 |
R/W |
|
18 |
Stream line buffer full |
0x0 |
R/W |
|
17 |
Stop state |
0x0 |
R/W |
|
16 |
Reserved |
N/A |
N/A |
|
15 |
Reserved |
N/A |
N/A |
|
14 |
Reserved |
N/A |
N/A |
|
13 |
SoT error |
0x0 |
R/W |
|
12 |
SoT Sync error |
0x0 |
R/W |
|
11 |
ECC 2-bit error |
0x0 |
R/W |
|
10 |
ECC 1-bit error (Detected and Corrected) |
0x0 |
R/W |
|
9 |
CRC error |
0x0 |
R/W |
|
8 |
Unsupported Data Type |
0x0 |
R/W |
|
7 |
Frame synchronization error for VC3 |
0x0 |
R/W |
|
6 |
Frame level error for VC3 |
0x0 |
R/W |
|
5 |
Frame synchronization error for VC2 |
0x0 |
R/W |
|
4 |
Frame level error for VC2 |
0x0 |
R/W |
|
3 |
Frame synchronization error for VC1 |
0x0 |
R/W |
|
2 |
Frame level error for VC1 |
0x0 |
R/W |
|
1 |
Frame synchronization error for VC0 |
0x0 |
R/W |
|
0 |
Frame level error for VC0 |
0x0 |
R/W |