The External Interface is present when controllers require access to external data. When present, the EXT shim in the system-level design example is a fixed-function SPI bus master. This shim accepts commands from controllers that consist of an address and a byte count. The shim generates SPI bus transactions to fetch the requested data from an external SPI flash. The shim formats the returned data for controllers to pick up.
The shim uses standard SPI bus protocol, implementing the most common mode (CPOL = 0, CPHA = 0, often referred to as “Mode 0”). The SPI bus clock frequency is locked to one half of the master clock for the system-level design example. See Designing with the Core for information on external timing budgets.
The resulting interface is directly compatible with a wide array of standard SPI flash. External level translators might be necessary depending on system requirements.