The Xilinx® LogiCORE™ IP peak cancellation crest factor reduction (PC-CFR) core is used to limit the dynamic range of the signals being transmitted in wireless communications and other applications. It is an efficient, flexible, and easy-to-use implementation that supports Virtex® UltraScale™, Kintex® UltraScale, Virtex-7, Kintex-7, Artix®-7, and Zynq® UltraScale+™ devices (Zynq SoC, MPSoC, and RFSoC). On a Zynq UltraScale+™ RFSoC DFE device, PC-CFR allows for selection of PL-only option or use of DFE-CFR Primitive along with PL resources.