Safe Timing Clocking Topologies for DPLL

Versal Adaptive SoC Clocking Resources Architecture Manual (AM003)

Document ID
AM003
Release Date
2023-05-16
Revision
1.5 English

The following tables document the netlist topologies and clock manager settings for DPLL. The key difference between MMCM and XPLL and DPLL is that DPLL has only one set of PD and the digital deskew mode requires that CLKIN is connected to CLKIN_DESKEW. In addition, CLKIN to CLKOUTx cannot be safely timed when CLKOUTx_PHASE_CTRL = 00 or 10 and CLKOUTx to CLKOUTy cannot be safely timed when CLKOUTx_PHASE_CTRL = 00 or 10 for one and 01 for the other.

Use the following convention to interpret the conditions in the subsequent tables.

Conditional
It is safe to time the signals of interest only if the condition in the header is met. Known skew indicates that the timing between the signals of interest can be calculated by the timer.
N/A
It is always safe to time the signals of interest regardless of the condition in the header.
Never Safe
Signals of interest cannot be safely timed with the given PD setting regardless of the condition in the header.
Table 1. CLKOUTx Settings that Allow for Safe Timing with CLKIN
CLKOUTx_PHASE_CTRL Known Skew CLKIN→CLKIN_DESKEW Info Only: Phase Shift Controlled By
00 Never Safe Fixed phase, no deskew
10 Never Safe Phase shift interface 1
01 Conditional PD1
  1. Timing based on the initial phase, same as CLKOUTx_PHASE_CTRL=00.
Table 2. CLKOUTx Settings that Allow for Safe Timing with CLKOUTy (CLKOUTy_PHASE_CTRL=00 or 10)
CLKOUTx_PHASE_CTRL Known Skew CLKIN→CLKIN_DESKEW Info Only: Phase Shift Controlled By
00 N/A Fixed phase, no deskew
10 N/A Phase shift interface 1
01 Never Safe PD1
  1. Timing based on the initial phase, same as CLKOUTx_PHASE_CTRL=00.
Table 3. CLKOUTx Settings that Allow for Safe Timing with CLKOUTy (CLKOUTy_PHASE_CTRL=01)
CLKOUTx_PHASE_CTRL Known Skew CLKIN→CLKIN_DESKEW Info Only: Phase Shift Controlled By
00 Never Safe Fixed phase, no deskew
10 Never Safe Phase shift interface 1
01 N/A PD1 2
  1. Timing based on the initial phase, same as CLKOUTx_PHASE_CTRL=00.
  2. Both CLKOUTx and CLKOUTy must have the same frequency which is equivalent to having the same CLKOUTx_DIVIDE setting. For more information, see Functioning of Deskew.