References - 1.0 English

MicroBlaze Triple Modular Redundancy (TMR) Subsystem (PG268)

Document ID
PG268
Release Date
2022-04-28
Version
1.0 English

These documents provide supplemental material useful with this product guide:

1. AXI Timebase Watchdog Timer LogiCORE IP Product Guide ( PG128 )

2. AMBA AXI and ACE Protocol Specification ( Arm IHI 0022E )

3. AMBA AXI4-Stream Protocol Specification Version 1.0 ( Arm IHI 0051A )

4. 7 Series FPGAs Configuration User Guide ( UG470 )

5. MicroBlaze Processor Reference Guide ( UG984 )

6. Soft Error Mitigation Controller LogiCORE IP Product Guide ( PG036 )

7. UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide ( PG187 )

8. AXI UART Lite LogiCORE IP Product Guide ( PG142 )

9. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator ( UG994 )

10. Vivado Design Suite User Guide: Designing with IP ( UG896 )

11. Vivado Design Suite User Guide: Getting Started ( UG910 )

12. Vivado Design Suite User Guide: Logic Simulation ( UG900 )

13. Vivado Design Suite User Guide: Programming and Debugging ( UG908 )

14. AXI Interconnect LogiCORE IP Product Guide ( PG059 )

15. LogiCORE IP LMB BRAM Interface Controller Product Guide ( PG112 )

The following lists additional resources you can access directly using the provided URLs:

16. Brigham Young University, Configurable Computing Lab: http://reliability.ee.byu.edu/