Features - 1.0 English

MicroBlaze Triple Modular Redundancy (TMR) Subsystem (PG268)

Document ID

PG268

Release Date

2022-04-28

Version

1.0 English

• Complete Triple Modular Redundancy solution for MicroBlaze providing:

° TMR Manager to control the overall redundancy state and supervise soft error mitigation

° TMR Voter to implement a self-checking voter that generates outputs from the triplicated sub-blocks

° TMR Comparator to implement a self-checking comparison of outputs from the triplicated sub-blocks, and generate errors in the case of mismatch

° TMR Inject to implement functional level fault injection for test purposes

° TMR Soft Error Mitigation (SEM) interface, to encapsulate the Xilinx Soft Error Mitigation IP core.

• Complete Lockstep solution for MicroBlaze providing optional temporal delay.

• Vivado IP integrator automation to greatly simplify the creation of a triplicated MicroBlaze subsystem.

• TMR Manager example design.

IP Facts Table
Subsystem Specifics
Supported Device Family ⁽¹⁾	UltraScale+™ UltraScale™ Zynq®-7000 SoC 7 Series Versal®
Supported User Interfaces	ACE, AXI4-Lite, AXI4-Stream, BRAM, Dynamic Reconfiguration Port (DRP), GPIO, Local Memory Bus (LMB), Interrupt, UART
Resources	Performance and Resource Utilization web page: TMR Manager , TMR Voter , TMR Comparator , TMR Inject , TMR SEM
Provided with Subsystem
Design Files	RTL
Example Design	VHDL
Test Bench	Not Provided
Constraints File	Xilinx Design Constraints (XDC)
Simulation Model	Not Provided
Supported S/W Driver ⁽²⁾	Standalone
Tested Design Flows ⁽³⁾
Design Entry	Vivado® Design Suite
Simulation	For supported simulators, see the Xilinx Design Tools: Release Notes Guide.
Synthesis	Vivado Synthesis
Support
Release Notes and Known Issues	Master Answer Record: 68483
All Vivado IP Change Logs	Master Vivado IP Change Logs: 72275
Xilinx Support web page
Notes: 1. For a complete list of supported devices, see the Vivado IP catalog. 2. Standalone driver details can be found in <install_directory>/Vitis/<release>/data/embeddedsw/doc/xilinx_drivers.htm. 3. For the supported versions of the tools, see the Xilinx Design Tools: Release Notes Guide .