Parsing Design Files, xvhdl and xvlog - 2022.1 English

The xvhdl and xvlog commands parse VHDL and Verilog files, respectively. Descriptions for each option are available in Table 1.

xvhdl

The xvhdl command is the VHDL analyzer (parser).

xvhdl Syntax

xvhdl 
[-encryptdumps] 
[-f [-file] <filename>]
[-h [-help]
[-initfile <init_filename>]
[-L [-lib] <library_name> [=<library_dir>]]
[-log <filename>]
[-nolog] 
[-prj <filename>]
[-relax]
[-v [verbose] [0|1|2]]
[-version] 
[-work <library_name> [=<library_dir>]
[-incr]
[-2008]
[-93_mode]
[-nosignalhandlers]

This command parses the VHDL source file(s) and stores the parsed dump into a HDL library on disk.

xvhdl Examples

xvhdl file1.vhd file2.vhd
xvhdl -work worklib file1.vhd file2.vhd
xvhdl -prj files.prj

xvlog

The xvlog command is the Verilog parser. The xvlog command parses the Verilog source file(s) and stores the parsed dump into a HDL library on disk.

xvlog Syntax

xvlog 
[-d [define] <name>[=<val>]]
[-encryptdumps]
[-f [-file] <filename>]
[-h [-help]]
[-i [include] <directory_name>]
[-initfile <init_filename>]
[-L [-lib] <library_name> [=<library_dir>]]
[-log <filename>]
[-nolog]
[-noname_unamed_generate]
[-relax]
[-prj <filename>]
[-sourcelibdir <sourcelib_dirname>]
[-sourcelibext <file_extension>]
[-sourcelibfile <filename>]
[-sv]
[-v [verbose] [0|1|2]]
[-version] 
[-work <library_name> [=<library_dir>]
[-incr]
[-nosignalhandlers]
[-uvm_version arg]

xvlog Examples

xvlog file1.v file2.v
xvlog -work worklib file1.v file2.v
xvlog -prj files.prj

The simulation launching is Vivado dependent and hence is done through xsim Tcl command.

For usage of simulation outside Vivado, an executable by the same name as xsim is provided. The xsim executable launches Vivado in project less mode and executes xsim Tcl command to launch simulation. Hence, to get help on xvlog, xvhdl, xelab form within Vivado IDE, please precede the command with exec.

Example: exec xvlog –help.

To get help on xsim, use xsim –help.