Performance of Different Models - 3.4 English

DPUCZDX8G for Zynq UltraScale+ MPSoCs Product Guide (PG338)

Document ID
PG338
Release Date
2022-01-20
Version
3.4 English

In this section, the performance of several models is given for reference. The results shown in the following table were measured on a Xilinx® ZCU102 board with three B4096 cores with 16 threads running at 287 MHz.

Table 1. Performance of Different Models
Network Model Workload (GOPs per image) Input Image Resolution Accuracy (DPUCZDX8G) 2 Frame per second (FPS)
Inception-v1 3.2 224*224 Top-1: 0.6954 452.4
ResNet50 7.7 224*224 Top-1: 0.7338 163.4
MobileNet_v2 0.6 299*299 Top-1: 0.6352 587.2
SSD_ADAS_VEHICLE 1 6.3 480*360 mAP: 0.4190 306.2
SSD_ADAS_PEDESTRIAN 1 5.9 640*360 mAP: 0.5850 279.2
SSD_MobileNet_v2 6.6 480*360 mAP: 0.2940 124.7
YOLO-V3-VOC 65.4 416*416 mAP: 0.8153 43.6
YOLO-V3_ADAS 1 5.5 512*256 mAP: 0.5301 239.7
  1. These models were pruned by the Vitis AI Optimizer.
  2. Accuracy values are obtained using 8-bit quantization.