The Software Reset Register (SRR) permits resetting the core independently of other cores in the system.
IMPORTANT: To activate the software-generated reset, the value of 0x0000_000a must be written to the Software Reset Register.
Writing 0x0000_000a to the SRR resets the core register for four AXI clock cycles. Any other write access generates undefined results and results in an error. The bit assignment in the software reset register is shown in This Figure and described in Table: Software Reset Register Description (Core Base Address + 0x40). Any attempt to read this register returns undefined data.
