References - 3.2 English

PG153 AXI Quad SPI Product Guide

Document ID
PG153
Release Date
2022-04-26
Version
3.2 English

These documents provide supplemental material useful with this product guide:

1.UltraScale Architecture Libraries Guide (UG974)

2.Vivado Design Suite User Guide: Designing with IP (UG896)

3.Vivado AXI Reference Guide (UG1037)

4.AMBA AXI4-Stream Protocol Specification (ARM IHI 0051A)

5.Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)

6.Vivado Design Suite User Guide: Getting Started (UG910)

7.Vivado Design Suite User Guide: Logic Simulation (UG900)

8.ISE to Vivado Design Suite Migration Methodology Guide (UG911)

9.Vivado Design Suite User Guide: Programming and Debugging (UG908)

10.Motorola M68HC11-Rev. 4.0 Reference Manual

11.Motorola MPC8260 PowerQUICC II Users Manual 4/1999 Rev. 0

12.AXI4-Lite IPIF LogiCORE IP Product Guide (PG155)

13.AXI Interconnect LogiCORE IP Product Guide (PG059)

14.Winbond memory data sheet (W25Q64BV)

15.Micron memory data sheet (N25Q256-3v)

16.7 Series FPGAs Data Sheet: Overview (DS180)

17.7 Series FPGAs Configuration User Guide (UG470)

18.Execute-in-Place (XIP) with AXI Quad SPI Using Vivado IP Integrator Application Note (XAPP1176)

19.Throughput Performance Measurement Application Note (XAPP797)

20.Vivado Design Suite User Guide: Implementation (UG904)

21.Migrating from Micron’s N25Q to Micron’s MT25 technical note (TN-25-01)

22.UltraScale FPGA Post-Configuration Access of Parallel NOR Flash Memory using STARTUPE3 (XAPP1282)

23.UltraScale FPGA Post-Configuration Access of SPI Flash Memory using STARTUPE3 (XAPP 1280)