CHI and CHI Interface - 5.0 English

System Cache LogiCORE IP Product Guide (PG118)

Document ID
PG118
Release Date
2021-11-05
Version
5.0 English
Table 1. CHI and CHI Interface Parameters
Parameter Name Feature/Description

Allowable Values

Default Value

VHDL Type
C_ENABLE_CHI_DATACHECK_ERROR 1 Enable CHI Data Check Error 0, 1 1 natural
C_ENABLE_CHI_POISON_ERROR 1 Enable CHI Poison Error 0, 1 1 natural
C_M0_CHI_PROTOCOL 1 M0_CHI Protocol CHI, CHI-E CHI string
C_M0_CHI_ATOMIC_TRANSACTIONS 1 M0_CHI Atomic Transactions 0, 1 0 natural
C_M0_CHI_CACHE_STASH_TRANSACTIONS 1 M0_CHI Cache Stash Transactions 0 0 natural
C_M0_CHI_DIRECT_MEMORY_TRANSFER 1 M0_CHI Direct Memory Transfer 0, 1 0 natural
C_M0_CHI_DATA_POISON 1 M0_CHI Data Poison 0, 1 0 natural
C_M0_CHI_DATA_CHECK 1 M0_CHI Data Check FALSE, ODD_PARITY FALSE string
C_M0_CHI_CCF_WRAP_ORDER 1 M0_CHI CCF Wrap Order 0, 1 0 natural
C_M0_CHI_REQ_ADDR_WIDTH 1 M0_CHI REQ Address Width 44 - 52 48 natural
C_M0_CHI_NODEID_WIDTH 1 M0_CHI Node ID Width 7 - 11 7 natural
C_M0_CHI_DATA_WIDTH M0_CHI Data Width 128, 256, 512 128 natural
C_M0_CHI_BARRIER_TRANSACTIONS 1 M0_CHI Barrier Transactions 0 0 natural
C_M0_CHI_ENHANCED_FEATURES 1 M0_CHI Enhanced Features 0, 1 1 natural
  1. Not available in the Customize IP dialog box.