Incoming transactions on slave ports, cache maintenance operation via the control port, as well as the current cache line state determine the kind of transactions output on the CHI interface, if any at all. The following tables show all types of events. Note that some of the write related events actually appear on the read channel.
| Event | Request | Memory | Request |
|---|---|---|---|
| Read Miss not Allocating | ReadNoSnp | Device nRnE Device nRE Non-Cacheable |
0x4 |
| Read Miss not Allocating (coherent) | ReadOnce | Snoopable WriteBack No-Allocate | 0x3 |
| Read Miss Allocating | ReadShared | Snoopable WriteBack Allocate | 0x1 |
| Read Hit (any type) | No bus event | ||
| Write Miss Allocating | ReadUnique | Snoopable WriteBack No-Allocate/Allocate | 0x7 |
| Write Hit Shared | CleanUnique | Snoopable WriteBack No-Allocate/Allocate | 0xB |
| Event | Request | Memory | Request |
|---|---|---|---|
| Write Miss not Allocating | WriteNoSnpPtl | Device nRnE Device nRE Non-Cacheable |
0x1C |
| Write Miss not Allocating (coherent) | WriteUniquePtl | Snoopable WriteBack No-Allocate | 0x18 |
| Evicting Dirty Line 1 | WriteBackFull | Snoopable WriteBack Allocate | 0x1B |
| Write Hit Unique | No bus event | ||
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