Adding Custom dtsi and bit Files to the FPGA Manager for Zynq-7000 Devices and Zynq UltraScale+ MPSoCs - 2022.2 English

PetaLinux Tools Documentation: Reference Guide (UG1144)

Document ID
UG1144
Release Date
2022-10-19
Version
2022.2 English
This section provides information on the mechanism and infrastructure required to work with custom IPs that are readily (hand-stitched) available dtsi files instead of relying on the XSA to generate them when the FPGA manager is enabled. This generates the dtbo and bin files and copies them into the rootfs /lib/firmware/xilinx directory.
  1. Create the FPGA manager template:
    $ petalinux-create -t apps --template fpgamanager -n can-interface --enable
    INFO: Create apps: can-interface
    INFO: New apps successfully created in <plnx-proj-root>/project-spec/meta-user/recipes-apps/can-interface
    INFO: Enabling created component...
    INFO: sourcing build environment
    INFO: silentconfig rootfs
    INFO: can-interface has been enabled
  2. Replace the default files with your own dtsi files. You can generate dtsi files using the device tree generator.
    $ cp can.dtsi can.bit project-spec/meta-user/recipes-apps/can-interface/files/
  3. You can provide the dtsi and bit files when creating the fpgamanager template application. Use the following command to create the application and copy the provided .dtsi and .bit files to the application files directory.
    
    petalinux-create -t apps --template fpgamanager -n can-interface --srcuri "<path-to-dtsi>/pl.dtsi <path-to-bitfile>/system.bit" --enable
    INFO: Create apps: can-interface
    INFO: Copying source urls into the project directory
    INFO: New apps successfully created in <plnx-proj-root>/project-spec/meta-user/recipes-apps/can-interface1
    INFO: Enabling created component...
    INFO: Sourcing build environment
    INFO: Silentconfig rootfs
    INFO: can-interface has been enabled
    
  4. Build the application:
    $ petalinux-build
  5. Check the target for dtbo and .bin files:
    $ ls /lib/firmware/xilinx/can-interface/
                   pl.dtbo   system.bit.bin
Note: You can modify the FPGA manager template recipe at <project-root-dir>/project-spec/meta-user/recipes-apps/can-interface/can-interface.bb.