GTXE2*/GTHE3 Clocking When Transmit Buffer Bypass is Disabled - 2.2 English

Video PHY Controller LogiCORE IP Product Guide (PG230)

Document ID
PG230
Release Date
2023-11-03
Version
2.2 English

For DisplayPort 1.2, connect the DP159 forwarded clock to any of the receive reference clock input. An external 135 MHz oscillator is required for transmit (this clock cannot be forwarded from the fabric). Use a valid reference clock selection through the driver API.

For DisplayPort 1.4, connect an external oscillator generated 270 MHz clock to the reference clock inputs of the transmitter and receiver (this clock cannot be forwarded from the fabric). Use a valid reference clock selection through the driver API. In DisplayPort 1.4, the Retimer forwarded clock is not used.

The txoutclk_out/rxoutclk_out signals are connected to the DisplayPort MAC controller.

Figure 1. GTXE2/GTHE3 Clocking (TX Buffer Bypass = Disabled)